印刷电路板解构技术

译自：woot14-grand.pdf

印刷电路板解构技术

Joe Grand

Grand Idea Studio, Inc.

            [e-mail]

摘要

印刷电路板(PCB)的主要目的逆向工程是确定电子系统或子系统的功能通过分析组件如何是相互联系的。我们进行了一系列试验的使用廉价的以家庭为基础的解决方案和最先进的技术的目标移除个人PCB层外墙涂料和访问。介绍了我们的结果从最有效的技术。.

1 Introduction

Reverse engineering – the art of undesigning an exist-ing system – is critical for determining functionality,forensic analysis/intelligence, or testing/verifying secu-rity schemes [1, 2]. The primary purpose of printedcircuit board (PCB) reverse engineering is to under-stand how components are interconnected. One step inthat process is to access and image each layer of thetarget circuit board. When all layers are placed together,a complete circuit layout can be identified. Armed withthis information, one can clone the design (e.g., to cre-ate counterfeits or recreate a previous design whosedocumentation has been lost [3, 4, 5]), identify areaswhere new features/capabilities can be added (e.g., in-jecting malicious functionality into an existing, off-the-shelf product), locate specific connections (e.g., a serialport or on-chip debug interface that can aid in interac-tion with or manipulation of a system), or derive how aproduct works by creating a schematic diagram (a sim-

plified, visual representation of the device’s electronicdesign).

This paper details the testing and analyses of PCBdeconstruction techniques using both inexpensivehome-based solutions with off-the-shelf materials andstate-of-the-art technologies in an attempt to removeexterior coatings and expose the PCB layers. Some ofthe techniques discussed in this paper are employed bysemiconductor manufacturers and PCB fabrication/assembly facilities for chip- and board-level failureanalysis and testing [6, 7], though they are generallylimited to small, specific areas.

In order for our research to mimic real-world sce-narios as closely as possible, we used multiple PCBswith varying fabrication specifications, including sim-ple 2-layer boards and complex, 10-layer boards fromhighly integrated, modern devices. Not every type wasinvolved in every experiment, but having a wide rangeand large number allowed us to sufficiently test varioustechniques.

The rest of this paper is structured as follows: Sec-tion 2 provides a background on PCB fabrication andcomposition. Sections 3, 4, and 5 detail the techniquesused in the three phases of PCB deconstruction: Soldermask removal, delayering, and imaging, respectively,and provide experiment procedures, results, and photos.Section 6 provides a list of the techniques and a charac-terization of each based on the time required, cost, ac-cess to equipment, ease of use, likelihood of success,and quality of result. We conclude with a summary ofour work in Section 7.

Figure 1: Separated layers of the Emic 2 Text-to-Speech Module, a 4-layer PCB. On their own, thelayers only tell part, if any, of the story. Placed together, a complete circuit layout can be identified.

2 PCB Composition

PCBs are created with layers of thin copper foil (con-ductive) laminated to insulating (non‐conductive) lay-ers. They form the physical carrier for and provide elec-trical pathways between electronic components. Byaccessing and imaging each individual copper layer of aPCB (Fig. 1), it is possible to reverse engineer the entirePCB layout.

Standard PCB fabrication technology allows fortrace widths as low as 3mil and mechanically‐drilledhole diameters of 8mil. State‐of‐the‐art processes sup-port trace and space widths less than 1mil, laser‐drilledmicrovia diameters of 0.4mil, via-in-pad construction,and passive electronic components embedded into sub-strate. Copper thickness, defined as the weight of cop-per per square foot, typically ranges from 0.5oz(0.7mil) to 4oz (5.6mil). A PCB cross-section will oftenprovide clues to its design and complexity (Fig. 2).

Once a PCB is fabricated, its surface is coated withsolder mask (also known as solder resist). Comprised ofepoxy, liquid photoimageable ink (LPI), or dry filmphotoimageable material, this non‐conductive layerprotects the PCB from dust and oxidation, and providesaccess to copper areas on the board that are desired tobe exposed (such as component pads or test points).The most commonly used solder mask color is green,though many other colors are available. Darker colorsmake visual identification of traces difficult.

A thin surface finish, in the form of lead‐based orlead-free solder, tin, silver, gold, or palladium, is thenapplied to the exposed copper to enhance solderabilityand/or for harder contact surfaces.

Figure 2: Cross-section of Apple’s 10-layeriPhone 4 Logic Board [8]. Inter-layer spac-ing is approximately 2mil and total thicknessis only 29.5mil (0.75mm).

Finally, a component legend (also known as a silk-screen) is printed onto the board using epoxy or print-able ink. This layer often contains the part designators,identification symbols, logos, and other manufacturingmarkings useful for PCB assembly/testing and fieldservice operations.

A comprehensive guide to PCB fabrication and de-sign processes can be found in [9].

3 Solder Mask Removal

The goal of this phase is to remove the solder maskfrom the PCB and expose the copper traces on the topand/or bottom layers with minimal damage. While it’ssometimes possible to identify the copper tracesthrough existing solder mask, removing the solder maskwill give a more clear view. The following processesassume no components are populated on the targetPCB.

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Figure 3: Hand sanding of a PCB to removesolder mask.

Figure 4: iPhone 4 Logic Board with soldermask removed (left). A 235x magnificationshows all copper traces intact with minimalscratching (right).

3.1 Sandpaper

Sandpaper is an effective and low cost method for sol-der mask removal. We obtained the best results byclamping the target PCB to a work table and using thesandpaper, held by hand, in even strokes at light pres-sure across the entire PCB surface (Fig. 3). Spare PCBsof the same height as the target were used as supportmaterial on both sides to help maintain planar motionand even sanding pressure. Care must be taken to en-sure that the underlying copper layer isn’t damaged byexcessive abrasion.

Different PCB surface finishes require differentsandpaper grit sizes. For example, on a PCB with thickhot air solder leveling (HASL) finish, we first used 60grit sandpaper to remove the thick solder from all of theexposed copper pads and then used 220 grit sandpaperto complete the solder mask removal. On the iPhone 4Logic Board, which has immersion gold plating, thinnersolder mask, and trace/space less than 3/3mil, we used aless abrasive 400 grit sandpaper (Fig. 4).

3.2

Figure 5: Using a fiberglass scratch brush ona PCB (left). The area of solder mask (1.1” x0.37”) was removed in under one minute(right).

Fiberglass Scratch Brush

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Fiberglass scratch brushes are handheld, pencil-shapedtools used for material cleaning and polishing. For ourexperiment, we used an Excelta Eurotool fiberglassscratch brush in even strokes at medium pressure (Fig.5). The result was very clean with only light wear of theunderlying copper. It is recommended to wear thickgloves when using this technique, as small fiberglassfragments break off the brush as it wears down and caneasily embed into the skin.

3.3 Abrasive Blasting

Abrasive blasting is a method of forcibly propelling astream of abrasive material against a target object. It istypically used to strip material from surfaces (e.g., frompaint, calcium deposits, or fungus) or add texture/artificial wear to a product. The abrasive material (alsoknown as media) comes in many forms to suit differentmaterials and finishes, including garnet, glass beads,crushed walnut shells, and synthetic abrasives.

For our experiment, we used an industrial-caliberTP Tools Skat Blast 1536 Champion blast cabinet withan 80 pounds per square inch (PSI), 10-15 cubic feetper minute (CFM) output of 60 grit aluminum oxide(Fig. 6).

Micro-abrasive blasting cabinets also exist, whichare designed to more accurately deliver abrasive to asmall part or a small area of a larger part, but were notavailable for use during our research.

Figure 6: The TP Tools Skat Blast 1536Champion abrasive blast cabinet (left) andinterior view showing a target PCB and idealpositioning of the nozzle (right).

Figure 7: Top side of a PCB after abrasiveblasting (left). A 235x magnification (right)shows the pitting on the PCB surface in moredetail.

We obtained the best results when the nozzle wasangled and held 6” to 8” away from the PCB. The cop-per and underlying substrate remained intact, thoughthere was noticeable pitting due to the abrasive media(Fig. 7). A softer media, such as crushed walnut shells,may cause less surface wear.

Abrasive blasting is most suited for simple PCBswith large features (10/10mil trace/space or greater) andcopper weight of 1oz (1.4mil) or more. Regardless ofPCB construction, there is a risk of damaging underly-ing copper by overzealous use of the tool or remainingon one area of the PCB for too long.

3.4 Chemical

Chemical removal of solder mask is often used by PCBfabricators to remedy a manufacturing error or for fail-ure analysis purposes. Ristoff C-8 and Magnastrip 500are two chemicals specifically formulated for this pur-pose. They both require hazardous chemical handlingand disposal procedures, and misuse can lead to fire,explosion, severe burns, and other health hazards. Nei-ther chemical will attack the PCB substrate/laminateprovided proper operating procedure is followed.

Figure 8: Workspace for our chemical re-moval experiments.

The workspace for our experiments consisted of achemical-resistant drop cloth, hot plate, beaker, ther-mometer, glass tray, stainless steel tongs, and safetyequipment (Fig. 8). Our work was performed outdoors,but could also have been done indoors given a properlyventilated area, such as underneath a fume hood.

Ristoff C-8, created by NWE Chem Research in theUnited Kingdom, works against fully cured, aqueousdevelopable LPI and ultraviolet (UV) curable soldermasks. The chemical comes in a concentrated form andrequires a 50/50 mix with deionized water before use.Its primary hazardous components include potassiumhydroxide, 2-aminoethanol, and 2-butoxyethanol.

Magnastrip 500, manufactured and sold by RBPChemical Technology in the United States, worksagainst fully cured, LPI acrylic solder masks, but doesnot work against screen printed epoxy thermal-curedsolder masks. The chemical comes ready-to-use anddoes not require any dilution. Its primary hazardouscomponents include monoethanolamine, methyl pyrro-lidone, sodium hydroxide, and glycol ether.

Both chemicals have similar recommended operat-ing procedures, which we adhered to for our experi-ments. Our process was as follows:

1. Heated the chemical to 120-140°F (up to 200°F forMagnastrip 500). We used a 1L glass beaker on aBarnstead Thermolyne Type 1900 Laboratory HotPlate.

2. Placed the target PCB into the beaker and waitedfor solder mask stripping to occur (45-120 minutesfor Ristoff C-8 and 15-60 minutes for Magnastrip500). Actual processing time will vary due tochemical temperature, solder mask composition,and solder mask thickness. As the solder maskbroke down, it flaked off the PCB into the solution.

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Figure 9: Results with Ristoff C-8 after a 30minute (left), 60 minute (center), and 90minute (right) soak at 130°F.

3.

Figure 10: Results with Magnastrip 500 aftera 60 minute (left) and 75 minute (right) soakat 150°F.

Removed the PCB from the beaker and brushedlightly with a soft metal brush under running water.This helped to lift any remaining solder mask fromthe board.

Figure 11: The LPKF MicroLine 600D UVLaser System.

Figure 12: Small areas of solder mask (1.22" x 0.12")removed via laser ablation.

After a machine setup time of approximately 30minutes, we ran single passes at medium power acrosssmall, specific areas of target PCBs. The laser was suc-cessful in removing solder mask from both boards,leaving copper fully intact (Fig. 12). The carbonresidue/soot remaining on the exposed copper surfaceswas removed with steel wool under running water.

Solder mask and substrate react more quickly to theUV laser than copper, so care must be taken to ensurethat the laser power is properly adjusted to the mini-mum required for a given target PCB. Otherwise, sub-sequent copper layers could be exposed as inner layersubstrates are inadvertently removed.

With the laser traveling at a maximum speed of300mm/second (11.8”/second) and a beam diameter ofapproximately 20um (0.787mil), processing an entirePCB could take anywhere from a few minutes to a fewhours depending on surface area and solder mask thick-ness.

4 Delayering

The goal of this phase is to access the inner copper lay-ers of a multi-layer PCB by way of physical, destructivedelayering. The following processes assume no compo-nents are populated on the target PCB.

The results for both chemicals were excellent, pro-ducing clean, exposed top/bottom copper layers with noabrasion or scratching (Fig. 9 and 10). However, silk-screen is more resistant to Magnastrip 500 than RistoffC-8, and required a longer soak in order for the soldermask underneath the silkscreen to completely breakdown.

3.5 Laser

Laser skiving is traditionally used for selective, highlycontrolled material removal or rework (e.g., accessingand/or cutting a single trace on a PCB’s inner layer).Our experiments were performed using a LPKF Micro-Line 600D UV Laser System (Fig. 11), which is de-signed for accurate (+/-0.6mil), stress free cutting offlex circuits and coverlayer material (e.g., foil, film, oradhesive).

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Figure 13: Hand sanding to remove thePCB’s top copper layer (left) and the result-ing inner layer 2 (right).

4.1 Sandpaper

Sandpaper is an effective and low cost method for re-moving layers of PCB material. However, the requiredpressure and repeated sanding motions can quicklycause operator fatigue in the arms and hands.

For our experiment, we mounted a target 4-layerPCB to our work table with double-sided tape. Then,we used 60 grit sandpaper held by a Norton SheetSander tool in hard, full strokes across the entire PCBarea (Fig. 13). After approximately 20 minutes of effort,all substrate was successfully removed and inner layer 2was exposed. The resulting layer exhibited minorscratching and noticeable wearing of copper along theedges due to uneven sanding.

4.2 Dremel Tool

The Dremel MultiPro is a common, off-the-shelf homeimprovement tool used in a variety of applications, in-cluding cutting, grinding, drilling, routing, polishing,and sanding. For our experiment, we used a Dremel 503flapwheel (120 grit, 3/8” wide) attachment (Fig. 14).The flapwheel is difficult to align and must be kept flatin order to prevent an edge from digging into the PCB.A Dremel 225 flexible shaft will help to move the bodyof the Dremel tool away from the work surface andmake it easier to keep the flapwheel flat against thePCB.

We were able to expose layer 3 of the target PCB injust under nine minutes using back and forth motions atmedium pressure. It was difficult to achieve even abra-sion across the entire PCB surface, which caused cop-per in some areas to be exposed earlier than others. Thiscould be remedied with more practice using the tool.

Figure 14: Using the Dremel tool to exposelayer 3 through the substrate (left) and theresulting inner layer (right).

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Figure 15: The T-Tech QuickCircuit 5000PCB Prototyping System and host laptoprunning IsoPro 2.7.

4.3 CNC Milling

CNC milling machines are used for highly accurate,computer controlled removal or engraving of material.Many different types of CNC milling equipment exist,including PCB prototyping machines, which create cus-tom PCBs by milling traces and pads on copper-cladstock.

For our experiment, we used a T-Tech QuickCircuit5000 PCB Prototyping System (Fig. 15) with a Think& Tinker MN208-1250-019F 1/8” diameter carbideendmill specifically designed for working with non-ferrous materials. Control and manipulation of milling,drilling, and routing procedures are achieved using T-Tech’s IsoPro software running on a host computer,except for tool type, tool cutting depth (Z-axis), andsolenoid force, which are manually set by the operator.The QuickCircuit 5000’s Z-axis can be adjusted in10um (0.4mil) increments.

Figure 16: Close-up of the T-Tech QuickCir-cuit 5000 milling a layer of the iPhone 4Logic Board.

Our goal was to access the inner layers of a smallportion of the iPhone 4 Logic Board. First, a mechani-cal outline of the desired PCB area (0.92” x 0.58”) wascreated in IsoPro and configured to rubout all materialinside of the area (Fig. 16). This step provided accurate,repeatable, and automatic positioning of the millingpath, as opposed to manually controlling the machine.Then, we adjusted the Z-axis depth in approximately1mil increments between runs of the milling machine(set to move at a rate of 8”/minute with a spindle speedof 24,000 RPM). When we could begin to see the nextlayer of copper beneath the substrate, we stopped mill-ing and used a fiberglass scratch brush (detailed in Sec-tion 3.2) to remove the remaining substrate and exposethe area.

We were successful in fully exposing inner layers 2through 5 on a portion of the iPhone PCB in approxi-mately two hours (Fig. 17). Some traces appear to bemissing (likely due to rushed use of the scratch brush),but the overall result is promising given the complexityof the target PCB.

The method requires time and patience to slowlyincrease the Z-axis depth to avoid accidental damage ofthe target PCB’s inner layers. Though our experimentfocused on a small portion of the PCB, the processcould certainly be expanded to work on the entire boardarea with the same results.

4.4 Surface Grinding

Surface grinding is an abrasive machining process usedfor material grinding and surface finishing. A surfacegrinding machine consists of a rotating abrasive wheel(also known as a grinding wheel), work surface, and a

Figure 17: Inner layers 2 through 5 of a por-tion of the iPhone 4 Logic Board (clockwisestarting at the upper left) achieved with CNCmilling.

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Figure 18: The Blohm PROFIMAT CNCCreep Feed Surface Grinder with a SiemensSINUMERIK 810G controller.

reciprocating or rotary table controlled manually or by acomputer.

Our experiment was performed on a Blohm PRO-FIMAT CNC Creep Feed Surface Grinder with a Ra-diac 1 3/8”-wide grinding wheel (Fig. 18). Despite itssize, this machine is highly precise and allows depthcontrol in 0.1mil increments. Once it is properly alignedto the target material and configured to the desiredgrinding parameters and surface finish (which takesapproximately 30 minutes by a trained operator), it runsquickly and consistently.

A 6-layer target PCB was mounted to a 1” steelblock, which was held in place by the machine’s mag-netic chuck. The depth was adjusted in small incre-ments (starting at 0.5mil and increasing to 2mil) in be-tween runs of the surface grinder until we were able tosee the next layer of copper beneath the substrate. Each

Figure 19: Inner layers 2 through 5 of a 6-layer PCB achieved with surface grinding(clockwise starting from the upper left).

run of the machine took approximately 45 seconds. Ifthe target PCB’s inter-layer spacing is known or can bedetermined with a cross-section measurement, less trialand error will be necessary and the process can be ex-pedited. Occasionally, the grinding wheel was putthrough a dressing process to maintain the wheel’s de-sired roughness and shape. This process took approxi-mately one minute.

Surface grinding was successful in revealing theinner layers of the PCB (Fig. 19). The resulting surfacefinish, 32 Root-Mean-Square (RMS), was so smooththat each copper layer was clearly visible through theremaining fiberglass substrate. This precluded the needto fully expose the copper layer in order to obtain ausable image.

The process will work well with PCBs of nearly anysize, though custom mounting methods may need to becreated for boards that do not contain mounting holes orto help flatten a board that is bowing/flexing. Ensurethat the PCB is not removed from the machine part waythrough the process, as properly realigning the PCB isdifficult and may affect subsequent grinding runs.

5 Imaging

The goal of this phase is to obtain individual imagelayers of a multi-layer PCB using non-destructive imag-ing techniques. Such techniques may be successful evenagainst a fully assembled/populated PCB.

Figure 20: The DAGE XD7500VR X-raySystem (left) and inside the X-ray chamber(right).

Figure 21: X-ray images of a 4-layer PCB,top down (left) and angled close-up (right).

5.1 X-ray (2D)

X-ray inspection equipment is typically used during thePCB assembly process to verify component placementand proper solder quality, or after the assembly processfor failure analysis to identify, locate, or troubleshootdefective features. X-ray waves are emitted from an X-ray tube on one side of the target object and captured bya detector on the opposite side.

For our experiment, we used a DAGE XD7500VRX-ray Inspection System (Fig. 20) with multiple targetPCBs. For each PCB, a series of X-ray images weretaken at a variety of angles and contrasts. Due to thenature of 2D X-ray imaging, the resulting images werecomposites of all PCB layers. This made it difficult todetermine on which layer a particular trace was located(Fig. 21).

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X-ray inspection can still be useful to some extent,as one can get a general sense of PCB construction/layout and, for simple boards, visually follow traces/connections by manipulating the X-ray's angle andfield-of-view in real time. However, it would be a timeconsuming and tedious process to recreate full imagelayers using this method.

5.2 Computerized Tomography (3D X-ray)

Computerized Tomography (CT) is an X-ray imagingFigure 22: Screenshot from VGStudio 2.1method where a series of 2D X-ray images are post-showing X, Y, and Z cross-sectional views ofprocessed to create cross-sectional slices of the targeta PCB.
object. CT is frequently employed for complex inspec-

tion and failure analysis of PCBs, electronic componentpackaging, and solder ball quality.

For our experiment, we used a Nordson DAGEXD7600NT Ruby X-ray Inspection System (similar inexterior appearance to Fig. 20). This particular systemhad Nordson DAGE’s X-Plane software package in-stalled, which provided the CT functionality.

The first step in the process was to capture a seriesof 2D X-ray images (between 60 and 720, depending onthe desired resolution of the resulting cross-sectionalslices) by rotating the X-ray 360° in a single axisaround the target object. In our case, 360 images weretaken around a 4-layer Emic 2 Text-to-Speech ModulePCB at a 50° inclination angle. The entire scan took 36minutes, corresponding to one image every 6 seconds.Next, mathematical post-processing of the images re-sulted in 240 2D slices that could be viewed in anyplane (X, Y, or Z). The post-processing phase took only3 minutes. These slices were then imported intoVGStudio, an off-the-shelf software tool used for 3D

model manipulation, which provided a graphical envi-ronment to more easily analyze the images and to addvarious effects to show depth or highlight specific areas(Fig. 22).

The results were impressive, as we could movethrough the slices along the Z plane (from top to bottomthrough the PCB) and easily identify each of the targetPCB’s layers (Fig. 23). Note that the success of CT mayvary depending on PCB construction features, such aslayer stack-up, material composition, copper weight,and component placement.

A minor limitation of CT is the size of the X-raysystem’s field-of-view. The more area that is visiblewithin the field-of-view, the less resolution/detail willexist on the acquired images. As such, one will need tofind the balance between sufficient board visibility andimage quality, which in most cases won’t comprise theentire PCB area. In order to process a full PCB, multi-ple "segments" would need to be created and stitchedtogether.

Figure 23: CT images of the Emic 2 PCB. The field-of-view was limited to the bottom center areaof the board. The four layers (left to right) were confirmed to match the known layouts of Fig. 1.

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6 Characterization Matrix

Depending on goals and available resources, sometechniques may be more suitable than others. Table 1provides a list of PCB deconstruction techniques alongwith a characterization of each based on the time re-quired, cost, access to equipment, ease of use, likeli-hood of success, and quality of result. These criteria canbe used to aid in the selection of the most appropriatemethod for a particular situation.

7 Conclusion

This paper detailed our PCB deconstruction experi-ments, including solder mask removal, delayering, andimaging, and provided a number of practical, effective

techniques that could be used to access individual lay-ers of a target circuit board.

It is hoped that our work will serve as a comprehen-sive guide to PCB deconstruction techniques, help thoseinvolved in electronic product development understandwhich PCB fabrication techniques make PCB reverseengineering more difficult, and help further the generalknowledge and skill sets of the cyber security commu-nity and those involved in failure analysis, reverse en-gineering, and/or hardware hacking.

Technique
Solder Mask Removal

Sandpaper
Fiberglass scratch brushAbrasive sand blastingRistoff C-8
Magnastrip 500
Laser

Delayering

SandpaperDremel toolCNC millingSurface grinding

Imaging

X-ray (2D)
Computerized Tomography

TimeRequired

< 1 hour< 1 hour< 1 hour3-4 hours3-4 hours2-3 hours

2-3 hours< 1 hour3-4 hours3-4 hours

Many1-2 hours

Cost

$
$$$$$$$$$

$
$$$$$$

$$$$$$

Access toEquipment

EasyEasyModerateDifficultDifficultModerate

EasyEasyModerateModerate

ModerateModerate

Ease ofUse

EasyEasyMediumHardHardHard

EasyMediumHardHard

MediumMedium

Likelihood ofSuccess

FairExcellentFairExcellentExcellentVaries

Fair
PoorExcellentExcellent

PoorFair

Quality ofResult

GoodExcellentGoodExcellentExcellentExcellent

ExcellentVariesExcellentExcellent

VariesExcellent

Table 1: Characterization matrix of PCB deconstruction techniques.

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Acknowledgements

This work was funded by the Defense Advanced Re-search Projects Agency (DARPA) Cyber Fast Trackprogram. The views and opinions expressed in this pa-per are those of the author and do not reflect the officialpolicy or position of the Department of Defense or theUnited States Government.

We would like to thank BIT Systems for managingthe project, the USENIX WOOT ‘14 anonymous re-viewers for providing comments on this paper, andKeely, Benjamin, and Miles for their balance and sup-port.

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